[PATCH] D13648: AVX512: shuff62x2 DAG lowering

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.

================
Comment at: lib/Target/X86/Utils/X86ShuffleDecode.h:91
@@ -88,1 +90,3 @@
+void DecodeVSHUF128Mask(MVT VT, unsigned Imm,
+                          SmallVectorImpl<int> &ShuffleMask);
 
----------------
Shouldn't this be called DecodeVSHUF64x2Mask?

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10727
@@ +10726,3 @@
+  if (!canWidenShuffleElements(Mask, WidenedMask))
+    return SDValue();
+
----------------
Is this actually necessary? I'd expect it to have been dealt with by canonicalization in lowerVectorShuffle.

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Comment at: test/CodeGen/X86/avx512-intrinsics.ll:4184
@@ -4185,1 +4183,3 @@
+; CHECK:         vshuff64x2 $22, %zmm1, %zmm0, %zmm0
+; CHECK:         vaddpd %zmm0, %zmm2, %zmm0
 ; CHECK-NEXT:    vaddpd %zmm3, %zmm0, %zmm0
----------------
Why isn't this CHECK-NEXT any more?

================
Comment at: test/CodeGen/X86/avx512-intrinsics.ll:4185
@@ -4185,2 +4184,3 @@
+; CHECK:         vaddpd %zmm0, %zmm2, %zmm0
 ; CHECK-NEXT:    vaddpd %zmm3, %zmm0, %zmm0
 ; CHECK-NEXT:    retq
----------------
Why isn't this CHECK-NEXT any more?

================
Comment at: test/CodeGen/X86/avx512-intrinsics.ll:4221
@@ -4222,1 +4220,3 @@
+; CHECK:         vshufi64x2 $22, %zmm1, %zmm0, %zmm0
+; CHECK:         vpaddq %zmm0, %zmm2, %zmm0
 ; CHECK-NEXT:    retq
----------------
Why isn't this CHECK-NEXT any more?

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Comment at: test/CodeGen/X86/vector-shuffle-512-v8.ll:1237
@@ +1236,3 @@
+; ALL-NEXT:    vpmovsxwq %xmm1, %zmm1
+; ALL-NEXT:    vpandq {{.*}}(%rip){1to8}, %zmm1, %zmm1
+; ALL-NEXT:    vptestmq %zmm1, %zmm1, %k1
----------------
Nothing to do with this patch but its a shame that this is ANDing with a 512-bit constant mask instead of pre-ANDing with a 128-bit constant mask and then calling vpmovzxwq.


Repository:
  rL LLVM

http://reviews.llvm.org/D13648