[PATCH] D13655: DAGCombiner: Combine extract_vector_elt from build_vector

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 12 08:12:40 PDT 2015


arsenm created this revision.
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Herald added subscribers: arsenm, aemerson.

This basic combine was surprisingly missing.
AMDGPU legalizes many operations in terms of 32-bit vector components,
so not doing this results in many extra copies and subregister extracts
that need to be cleaned up later.
    
InstCombine already does this for the hasOneUse case. The target hook
is to fix a handful of tests which break (e.g. ARM/vmov.ll) which turn
from a vector materialize repeated immediate instruction to a constant
vector load with more scalar copies from it.

I think the isTypeLegal check should be !LegalTypes ||| isLegalType((), but there
seems to be an intentionally added bug in getConstant where a build_vector with
mismatched type and element type, so on x86 an i1 vector type is the result type
of a build_vector with i8 input elements.

http://reviews.llvm.org/D13655

Files:
  include/llvm/Target/TargetLowering.h
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.h
  test/CodeGen/AArch64/fold-constants.ll
  test/CodeGen/AMDGPU/ds_read2.ll
  test/CodeGen/AMDGPU/fceil64.ll
  test/CodeGen/AMDGPU/ftrunc.f64.ll
  test/CodeGen/AMDGPU/gep-address-space.ll

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