[llvm] r249989 - [X86] Remove special validation for INT immediate operand from AsmParser. Instead mark its operand type as u8imm which will cause it to fail to match. This is more consistent with other instruction behavior.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Oct 11 13:27:24 2015
New Revision: 249989

URL: http://llvm.org/viewvc/llvm-project?rev=249989&view=rev
Log:
[X86] Remove special validation for INT immediate operand from AsmParser. Instead mark its operand type as u8imm which will cause it to fail to match. This is more consistent with other instruction behavior.

This also fixes a bug where negative immediates below -128 were not being reported as errors.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/CodeGen/X86/int-intrinsic.ll
    llvm/trunk/test/MC/X86/validate-inst-att.s
    llvm/trunk/test/MC/X86/validate-inst-intel.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=249989&r1=249988&r2=249989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Sun Oct 11 13:27:24 2015
@@ -718,7 +718,6 @@ private:
   bool ParseDirectiveWord(unsigned Size, SMLoc L);
   bool ParseDirectiveCode(StringRef IDVal, SMLoc L);
 
-  bool validateInstruction(MCInst &Inst, const OperandVector &Ops);
   bool processInstruction(MCInst &Inst, const OperandVector &Ops);
 
   /// Wrapper around MCStreamer::EmitInstruction(). Possibly adds
@@ -2401,22 +2400,6 @@ static bool convert64i32to64ri8(MCInst &
   return convertToSExti8(Inst, Opcode, X86::RAX, isCmp);
 }
 
-bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
-  switch (Inst.getOpcode()) {
-  default: return true;
-  case X86::INT:
-    X86Operand &Op = static_cast<X86Operand &>(*Ops[1]);
-    assert(Op.isImm() && "expected immediate");
-    int64_t Res;
-    if (!Op.getImm()->evaluateAsAbsolute(Res) || Res > 255) {
-      Error(Op.getStartLoc(), "interrupt vector must be in range [0-255]");
-      return false;
-    }
-    return true;
-  }
-  llvm_unreachable("handle the instruction appropriately");
-}
-
 bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
   switch (Inst.getOpcode()) {
   default: return false;
@@ -2579,9 +2562,6 @@ bool X86AsmParser::MatchAndEmitATTInstru
                                isParsingIntelSyntax())) {
   default: llvm_unreachable("Unexpected match result!");
   case Match_Success:
-    if (!validateInstruction(Inst, Operands))
-      return true;
-
     // Some instructions need post-processing to, for example, tweak which
     // encoding is selected. Loop on it while changes happen so the
     // individual transformations can chain off each other.
@@ -2825,9 +2805,6 @@ bool X86AsmParser::MatchAndEmitIntelInst
   unsigned NumSuccessfulMatches =
       std::count(std::begin(Match), std::end(Match), Match_Success);
   if (NumSuccessfulMatches == 1) {
-    if (!validateInstruction(Inst, Operands))
-      return true;
-
     // Some instructions need post-processing to, for example, tweak which
     // encoding is selected. Loop on it while changes happen so the individual
     // transformations can chain off each other.

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=249989&r1=249988&r2=249989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Sun Oct 11 13:27:24 2015
@@ -44,7 +44,7 @@ def INT3 : I<0xcc, RawFrm, (outs), (ins)
 
 let SchedRW = [WriteSystem] in {
 
-def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap",
+def INT : Ii8<0xcd, RawFrm, (outs), (ins u8imm:$trap), "int\t$trap",
               [(int_x86_int imm:$trap)], IIC_INT>;
 
 

Modified: llvm/trunk/test/CodeGen/X86/int-intrinsic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/int-intrinsic.ll?rev=249989&r1=249988&r2=249989&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/int-intrinsic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/int-intrinsic.ll Sun Oct 11 13:27:24 2015
@@ -11,7 +11,7 @@ bb.entry:
   ret void
 }
 
-; CHECK: int	$-128
+; CHECK: int	$128
 ; CHECK: ret
 define void @primitive_int128 () {
 bb.entry:

Modified: llvm/trunk/test/MC/X86/validate-inst-att.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/validate-inst-att.s?rev=249989&r1=249988&r2=249989&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/validate-inst-att.s (original)
+++ llvm/trunk/test/MC/X86/validate-inst-att.s Sun Oct 11 13:27:24 2015
@@ -2,6 +2,11 @@
 
 	.text
 	int $65535
-# CHECK: error: interrupt vector must be in range [0-255]
+# CHECK: error: invalid operand for instruction
 # CHECK:	int $65535
 # CHECK:            ^
+
+	int $-129
+# CHECK: error: invalid operand for instruction
+# CHECK:	int $-129
+# CHECK:            ^

Modified: llvm/trunk/test/MC/X86/validate-inst-intel.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/validate-inst-intel.s?rev=249989&r1=249988&r2=249989&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/validate-inst-intel.s (original)
+++ llvm/trunk/test/MC/X86/validate-inst-intel.s Sun Oct 11 13:27:24 2015
@@ -3,7 +3,13 @@
 
 	.text
 	int 65535
-# CHECK: error: interrupt vector must be in range [0-255]
+# CHECK: error: invalid operand for instruction
 # CHECK:	int 65535
 # CHECK:            ^
 
+	.text
+	int -129
+# CHECK: error: invalid operand for instruction
+# CHECK:	int -129
+# CHECK:            ^
+