[llvm] r249945 - [SystemZ] Fixes in the backend I/R.

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Sat Oct 10 02:14:24 2015
New Revision: 249945

URL: http://llvm.org/viewvc/llvm-project?rev=249945&view=rev
Log:
[SystemZ] Fixes in the backend I/R.

expandPostRAPseudo():
STX -> 2 * STD: The first STD should not have the kill flag set for the address.

SystemZElimCompare:
BRC -> BRCT conversion: Don't forget to remove the CC<use,kill> operand.

Needed to make SystemZ/asm-17.ll pass with -verify-machineinstrs, which
now runs with this flag.

Reviewed by Ulrich Weigand.

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
    llvm/trunk/test/CodeGen/SystemZ/asm-17.ll

Modified: llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp?rev=249945&r1=249944&r2=249945&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp Sat Oct 10 02:14:24 2015
@@ -206,9 +206,8 @@ SystemZElimCompare::convertToBRCT(Machin
 
   // The transformation is OK.  Rebuild Branch as a BRCT(G).
   MachineOperand Target(Branch->getOperand(2));
-  Branch->RemoveOperand(2);
-  Branch->RemoveOperand(1);
-  Branch->RemoveOperand(0);
+  while (Branch->getNumOperands())
+    Branch->RemoveOperand(0);
   Branch->setDesc(TII->get(BRCT));
   MachineInstrBuilder(*Branch->getParent()->getParent(), Branch)
     .addOperand(MI->getOperand(0))

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=249945&r1=249944&r2=249945&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Sat Oct 10 02:14:24 2015
@@ -69,6 +69,9 @@ void SystemZInstrInfo::splitMove(Machine
   MachineOperand &LowOffsetOp = MI->getOperand(2);
   LowOffsetOp.setImm(LowOffsetOp.getImm() + 8);
 
+  // Clear the kill flag for the address reg in the first instruction.
+  EarlierMI->getOperand(1).setIsKill(false);
+
   // Set the opcodes.
   unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
   unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());

Modified: llvm/trunk/test/CodeGen/SystemZ/asm-17.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/asm-17.ll?rev=249945&r1=249944&r2=249945&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/asm-17.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/asm-17.ll Sat Oct 10 02:14:24 2015
@@ -1,6 +1,7 @@
 ; Test explicit register names.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s
+; RUN: llc < %s  -verify-machineinstrs -mtriple=s390x-linux-gnu -no-integrated-as \
+; RUN:   | FileCheck %s
 
 ; Test i32 GPRs.
 define i32 @f1() {