[llvm] r249594 - [mips][FastISel] Use ternary operator to select opcode. NFC
Vasileios Kalintiris via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 7 12:43:31 PDT 2015
Author: vkalintiris
Date: Wed Oct 7 14:43:31 2015
New Revision: 249594
URL: http://llvm.org/viewvc/llvm-project?rev=249594&view=rev
Log:
[mips][FastISel] Use ternary operator to select opcode. NFC
Modified:
llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFastISel.cpp?rev=249594&r1=249593&r2=249594&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsFastISel.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsFastISel.cpp Wed Oct 7 14:43:31 2015
@@ -1060,22 +1060,16 @@ bool MipsFastISel::selectFPToInt(const I
// entirely within FPRs.
unsigned DestReg = createResultReg(&Mips::GPR32RegClass);
unsigned TempReg = createResultReg(&Mips::FGR32RegClass);
- unsigned Opc;
-
- if (SrcVT == MVT::f32)
- Opc = Mips::TRUNC_W_S;
- else
- Opc = Mips::TRUNC_W_D32;
+ unsigned Opc = (SrcVT == MVT::f32) ? Mips::TRUNC_W_S : Mips::TRUNC_W_D32;
// Generate the convert.
emitInst(Opc, TempReg).addReg(SrcReg);
-
emitInst(Mips::MFC1, DestReg).addReg(TempReg);
updateValueMap(I, DestReg);
return true;
}
-//
+
bool MipsFastISel::processCallArgs(CallLoweringInfo &CLI,
SmallVectorImpl<MVT> &OutVTs,
unsigned &NumBytes) {
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