[PATCH] D13505: [X86] Fix bad treatment of multi-lane blends in BUILD_VECTORtoBlendMask()
Filipe Cabecinhas via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 7 08:49:51 PDT 2015
filcab added a comment.
I have a question:
This looks like it's to generate BLENDI nodes, in order to match the Intel instructions for blends with immediates...
But there are no byte-shuffles with immediates, AFAICT.
What did I miss?
P.S: If I change that function to bail out on ElemType == MVT::i8, I see the masks reversed (but both lanes are equal)...
================
Comment at: test/CodeGen/X86/vector-blend.ll:664
@@ +663,3 @@
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT: vmovdqa .LCPI18_0(%rip), %xmm4 # xmm4 = [255,255,0,255,0,0,0,255,255,255,0,255,0,0,0,255]
+; AVX1-NEXT: vpblendvb %xmm4, %xmm2, %xmm3, %xmm2
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Why are the "first lanes" changing here? Either it was completely wrong, and you're fixing it, or the replacement is wrong (the "second lane" was always wrong).
http://reviews.llvm.org/D13505
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