[llvm] r249547 - [ARM] Push more complex check down to reduce compile time. NFC.

[Chad Rosier via llvm-commits]

Author: mcrosier
Date: Wed Oct  7 08:40:44 2015
New Revision: 249547

URL: http://llvm.org/viewvc/llvm-project?rev=249547&view=rev
Log:
[ARM] Push more complex check down to reduce compile time. NFC.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=249547&r1=249546&r2=249547&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Oct  7 08:40:44 2015
@@ -9848,11 +9848,6 @@ static SDValue PerformVCVTCombine(SDNode
   if (!isa<BuildVectorSDNode>(ConstVec))
     return SDValue();
 
-  uint64_t C;
-  bool isSigned = N->getOpcode() == ISD::FP_TO_SINT;
-  if (!isConstVecPow2(ConstVec, isSigned, C))
-    return SDValue();
-
   MVT FloatTy = Op.getSimpleValueType().getVectorElementType();
   uint32_t FloatBits = FloatTy.getSizeInBits();
   MVT IntTy = N->getSimpleValueType(0).getVectorElementType();
@@ -9866,6 +9861,11 @@ static SDValue PerformVCVTCombine(SDNode
     return SDValue();
   }
 
+  uint64_t C;
+  bool isSigned = N->getOpcode() == ISD::FP_TO_SINT;
+  if (!isConstVecPow2(ConstVec, isSigned, C))
+    return SDValue();
+
   SDLoc dl(N);
   unsigned IntrinsicOpcode = isSigned ? Intrinsic::arm_neon_vcvtfp2fxs :
     Intrinsic::arm_neon_vcvtfp2fxu;
@@ -9904,11 +9904,6 @@ static SDValue PerformVDIVCombine(SDNode
   if (!isa<BuildVectorSDNode>(ConstVec))
     return SDValue();
 
-  uint64_t C;
-  bool isSigned = OpOpcode == ISD::SINT_TO_FP;
-  if (!isConstVecPow2(ConstVec, isSigned, C))
-    return SDValue();
-
   MVT FloatTy = N->getSimpleValueType(0).getVectorElementType();
   uint32_t FloatBits = FloatTy.getSizeInBits();
   MVT IntTy = Op.getOperand(0).getSimpleValueType().getVectorElementType();
@@ -9920,6 +9915,11 @@ static SDValue PerformVDIVCombine(SDNode
     return SDValue();
   }
 
+  uint64_t C;
+  bool isSigned = OpOpcode == ISD::SINT_TO_FP;
+  if (!isConstVecPow2(ConstVec, isSigned, C))
+    return SDValue();
+
   SDLoc dl(N);
   SDValue ConvInput = Op.getOperand(0);
   unsigned NumLanes = Op.getValueType().getVectorNumElements();