[PATCH] D13367: AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments()
Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 6 14:18:33 PDT 2015
This revision was automatically updated to reflect the committed changes.
Closed by commit rL249468: AMDGPU/SI: Remove calling convention assertion from LowerFormalArguments() (authored by tstellar).
Changed prior to commit:
http://reviews.llvm.org/D13367?vs=36314&id=36660#toc
Repository:
rL LLVM
http://reviews.llvm.org/D13367
Files:
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/calling-conventions.ll
Index: llvm/trunk/test/CodeGen/AMDGPU/calling-conventions.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/calling-conventions.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/calling-conventions.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI %s
+
+; Make sure we don't crash or assert on spir_kernel calling convention.
+
+; SI-LABEL: {{^}}kernel:
+; SI: s_endpgm
+define spir_kernel void @kernel(i32 addrspace(1)* %out) {
+entry:
+ store i32 0, i32 addrspace(1)* %out
+ ret void
+}
+
+; FIXME: This is treated like a kernel
+; SI-LABEL: {{^}}func:
+; SI: s_endpgm
+define spir_func void @func(i32 addrspace(1)* %out) {
+entry:
+ store i32 0, i32 addrspace(1)* %out
+ ret void
+}
Index: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -510,7 +510,7 @@
FunctionType *FType = MF.getFunction()->getFunctionType();
SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
- assert(CallConv == CallingConv::C);
+ // FIXME: We currently assume all calling conventions are kernels.
SmallVector<ISD::InputArg, 16> Splits;
BitVector Skipped(Ins.size());
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