[PATCH] D13161: [PATCH, PR24373] Combine shifts for x86
Evgeny Stupachenko via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 6 06:18:38 PDT 2015
evstupac added a comment.
In http://reviews.llvm.org/D13161#260607, @RKSimon wrote:
> In http://reviews.llvm.org/D13161#259762, @evstupac wrote:
>
> > > Also, please can you add tests against the load-execute versions movs*?
> >
> >
> > Do you mean segment moves? If so there are no sar/shl pair that could be folded to such mov.
>
>
> I meant something that tested that a load + shl + ashr pattern gets combined to a folded movs** instruction
Ok. Good point. Actually that is what "test/CodeGen/X86/sar_fold.ll" test now, as in 32 bit mode parameter "i32 %a" goes from stack. Let's add CHECK-NEXT after BB0:
; CHECK: # BB#0:
; CHECK-NEXT: movswl {{[0-9]+}}(%esp), %eax
to be sure that there is no simple "movl" from stack.
Repository:
rL LLVM
http://reviews.llvm.org/D13161
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