[PATCH] D13364: [x86] PR24562: fix incorrect folding of X86ISD::PSHUFB nodes that have a mask of all indices with the most significant bit set.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 3 05:30:47 PDT 2015


RKSimon added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:21966
@@ -21966,3 +21965,3 @@
   if (Mask.size() == 1) {
-    DCI.CombineTo(Root.getNode(), DAG.getBitcast(RootVT, Input),
-                  /*AddTo*/ true);
+    // We may end up with an accumulated mask of size 1 as a result of
+    // widening of shuffle operands (see function canWidenShuffleElements).
----------------
Can we assert here that the single Mask index is either SentinelZero or a valid element index? Undef should never get here correct?


http://reviews.llvm.org/D13364





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