[PATCH] D13235: [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend
Zlatko Buljan via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 2 05:33:47 PDT 2015
zbuljan updated the summary for this revision.
zbuljan updated this revision to Diff 36347.
zbuljan added a comment.
Removed summary line that references bugzilla.
Updated CHECK line with sqrt instruction: chaged to sqrt.s and added registers.
Removed unnecessary CHECK lines from .ll file.
http://reviews.llvm.org/D13235
Files:
lib/Target/Mips/MipsInstrFPU.td
test/CodeGen/Mips/llvm-ir/sqrt.ll
Index: test/CodeGen/Mips/llvm-ir/sqrt.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/llvm-ir/sqrt.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s
+
+define float @sqrt_fn(float %value) #0 {
+entry:
+ %sqrtf = tail call float @sqrtf(float %value) #0
+ ret float %sqrtf
+}
+
+declare float @sqrtf(float)
+
+; CHECK: sqrt.s $f0, $f12
Index: lib/Target/Mips/MipsInstrFPU.td
===================================================================
--- lib/Target/Mips/MipsInstrFPU.td
+++ lib/Target/Mips/MipsInstrFPU.td
@@ -353,11 +353,8 @@
defm FABS : ABSS_M<"abs.d", II_ABS, fabs>, ABSS_FM<0x5, 17>;
defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>;
-let AdditionalPredicates = [NotInMicroMips] in {
-def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S, fsqrt>,
- ABSS_FM<0x4, 16>, ISA_MIPS2;
-}
-
+def FSQRT_S : MMRel, StdMMR6Rel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd,
+ II_SQRT_S, fsqrt>, ABSS_FM<0x4, 16>, ISA_MIPS2;
defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>, ISA_MIPS2;
// The odd-numbered registers are only referenced when doing loads,
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