[llvm] r249041 - AMDGPU: Factor out EOP query.

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 1 10:51:29 PDT 2015


Author: tstellar
Date: Thu Oct  1 12:51:29 2015
New Revision: 249041

URL: http://llvm.org/viewvc/llvm-project?rev=249041&view=rev
Log:
AMDGPU: Factor out EOP query.

v2: Fix brace placement and capitalization (Matt).

Patch by: Zoltan Gilian

Modified:
    llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp?rev=249041&r1=249040&r2=249041&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp Thu Oct  1 12:51:29 2015
@@ -190,6 +190,10 @@ R600TargetLowering::R600TargetLowering(T
   setSchedulingPreference(Sched::Source);
 }
 
+static inline bool isEOP(MachineBasicBlock::iterator I) {
+  return std::next(I)->getOpcode() == AMDGPU::RETURN;
+}
+
 MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
     MachineInstr * MI, MachineBasicBlock * BB) const {
   MachineFunction * MF = BB->getParent();
@@ -276,12 +280,10 @@ MachineBasicBlock * R600TargetLowering::
   case AMDGPU::RAT_WRITE_CACHELESS_32_eg:
   case AMDGPU::RAT_WRITE_CACHELESS_64_eg:
   case AMDGPU::RAT_WRITE_CACHELESS_128_eg: {
-    unsigned EOP = (std::next(I)->getOpcode() == AMDGPU::RETURN) ? 1 : 0;
-
     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
             .addOperand(MI->getOperand(0))
             .addOperand(MI->getOperand(1))
-            .addImm(EOP); // Set End of program bit
+            .addImm(isEOP(I)); // Set End of program bit
     break;
   }
 
@@ -539,7 +541,7 @@ MachineBasicBlock * R600TargetLowering::
         }
       }
     }
-    bool EOP = (std::next(I)->getOpcode() == AMDGPU::RETURN) ? 1 : 0;
+    bool EOP = isEOP(I);
     if (!EOP && !isLastInstructionOfItsType)
       return BB;
     unsigned CfInst = (MI->getOpcode() == AMDGPU::EG_ExportSwz)? 84 : 40;




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