[llvm] r249011 - [AArch64] Hoist commonly failing check. NFC.

[Chad Rosier via llvm-commits]

Author: mcrosier
Date: Thu Oct  1 08:43:05 2015
New Revision: 249011

URL: http://llvm.org/viewvc/llvm-project?rev=249011&view=rev
Log:
[AArch64] Hoist commonly failing check. NFC.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp?rev=249011&r1=249010&r2=249011&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp Thu Oct  1 08:43:05 2015
@@ -904,6 +904,12 @@ MachineBasicBlock::iterator AArch64LoadS
   unsigned BaseReg = getLdStBaseOp(MemMI).getReg();
   int MIUnscaledOffset = getLdStOffsetOp(MemMI).getImm() * getMemScale(MemMI);
 
+  // Scan forward looking for post-index opportunities.  Updating instructions
+  // can't be formed if the memory instruction doesn't have the offset we're
+  // looking for.
+  if (MIUnscaledOffset != UnscaledOffset)
+    return E;
+
   // If the base register overlaps a destination register, we can't
   // merge the update.
   bool IsPairedInsn = isPairedLdSt(MemMI);
@@ -913,12 +919,6 @@ MachineBasicBlock::iterator AArch64LoadS
       return E;
   }
 
-  // Scan forward looking for post-index opportunities.  Updating instructions
-  // can't be formed if the memory instruction doesn't have the offset we're
-  // looking for.
-  if (MIUnscaledOffset != UnscaledOffset)
-    return E;
-
   // Track which registers have been modified and used between the first insn
   // (inclusive) and the second insn.
   BitVector ModifiedRegs, UsedRegs;