[PATCH] D12451: AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL248978: AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order (authored by tstellar).

Changed prior to commit:
  http://reviews.llvm.org/D12451?vs=33481&id=36173#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D12451

Files:
  llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.h

Index: llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.h
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.h
+++ llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -90,15 +90,18 @@
   bool opCanUseInlineConstant(unsigned OpType) const;
 
   enum PreloadedValue {
-    TGID_X,
-    TGID_Y,
-    TGID_Z,
-    SCRATCH_WAVE_OFFSET,
-    SCRATCH_PTR,
-    INPUT_PTR,
-    TIDIG_X,
-    TIDIG_Y,
-    TIDIG_Z
+    // SGPRS:
+    SCRATCH_PTR         =  0,
+    INPUT_PTR           =  3,
+    TGID_X              = 10,
+    TGID_Y              = 11,
+    TGID_Z              = 12,
+    SCRATCH_WAVE_OFFSET = 14,
+    // VGPRS:
+    FIRST_VGPR_VALUE    = 15,
+    TIDIG_X             = FIRST_VGPR_VALUE,
+    TIDIG_Y             = 16,
+    TIDIG_Z             = 17,
   };
 
   /// \brief Returns the physical register that \p Value is stored in.


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