[PATCH] D13161: [PATCH, PR24373] Combine shifts for x86

[Evgeny Stupachenko via llvm-commits]

evstupac added inline comments.

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Comment at: test/CodeGen/X86/sar_fold.ll:2
@@ +1,3 @@
+; RUN: llc < %s -O2 -march=x86 | FileCheck %s
+
+define i32 @shl16sar15(i32 %a) #0 {
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RKSimon wrote:
> Load tests?
> 
> Possibly regenerate this using update_llc_test_checks.py?
The test checks if "(a<<16)>>17" is folded to movswl and any of possible variant of "<<1". It could be "add %eax, %eax", "shl %eax" or even "lea". The test is to check only folding to movswl. Regenerating the test using update_llc_test_checks.py will make it less flexible.

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Comment at: test/CodeGen/X86/sar_fold64.ll:1
@@ +1,2 @@
+; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s
+
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RKSimon wrote:
> Load tests?
> 
> Possibly regenerate this using update_llc_test_checks.py?
Yes.


Repository:
  rL LLVM

http://reviews.llvm.org/D13161