[PATCH] D12032: Vector element extraction without stack operations on Power 8

[Nemanja Ivanovic via llvm-commits]

nemanjai added a comment.

Bill,
I've opened a work item to track the redundant rldicl instructions for unsigned versions of these. We can optimize those away at some point.
Since Hal's OK with this patch and if you're satisfied with the changes and the follow-up work item, please accept this patch and I'll commit it.


================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:558
@@ -554,1 +557,3 @@
         //setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i64, Legal);
+        setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Legal);
+        setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i16, Legal);
----------------
wschmidt wrote:
> You don't want to reintroduce this restriction, right?
That's just the existing code since the bootstrap failure fix is not committed yet.

================
Comment at: test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll:64
@@ -63,3 +63,3 @@
 ; FIXME-CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
 ; FIXME-CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
 }
----------------
wschmidt wrote:
> Same here -- don't disable these checks.
Same, that will be part of the commit for the bootstrap failure fix.

================
Comment at: test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll:735
@@ +734,3 @@
+; CHECK-LE: clrldi 3, 3, 48
+; CHECK-LE: extsh 3, 3
+}
----------------
wschmidt wrote:
> Similarly, the extsh should be peepholed away eventually.
We need the sign extends as we've discussed on IRC.


Repository:
  rL LLVM

http://reviews.llvm.org/D12032