[llvm] r248260 - ARMInstrInfo.cpp: Reformat.

[NAKAMURA Takumi via llvm-commits]

Author: chapuni
Date: Tue Sep 22 06:10:17 2015
New Revision: 248260

URL: http://llvm.org/viewvc/llvm-project?rev=248260&view=rev
Log:
ARMInstrInfo.cpp: Reformat.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=248260&r1=248259&r2=248260&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Tue Sep 22 06:10:17 2015
@@ -51,7 +51,8 @@ void ARMInstrInfo::getNoopForMachoTarget
 
 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
   switch (Opc) {
-  default: break;
+  default:
+    break;
   case ARM::LDR_PRE_IMM:
   case ARM::LDR_PRE_REG:
   case ARM::LDR_POST_IMM:
@@ -133,73 +134,71 @@ void ARMInstrInfo::expandLoadStackGuard(
 }
 
 namespace {
-  /// ARMCGBR - Create Global Base Reg pass. This initializes the PIC
-  /// global base register for ARM ELF.
-  struct ARMCGBR : public MachineFunctionPass {
-    static char ID;
-    ARMCGBR() : MachineFunctionPass(ID) {}
-
-    bool runOnMachineFunction(MachineFunction &MF) override {
-      ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
-      if (AFI->getGlobalBaseReg() == 0)
-        return false;
-      const ARMSubtarget &STI =
-          static_cast<const ARMSubtarget &>(MF.getSubtarget());
-      // Don't do this for Thumb1.
-      if (STI.isThumb1Only())
-	return false;
-
-      const TargetMachine &TM = MF.getTarget();
-      if (TM.getRelocationModel() != Reloc::PIC_)
-        return false;
-
-      LLVMContext *Context = &MF.getFunction()->getContext();
-      unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
-      unsigned PCAdj = STI.isThumb() ? 4 : 8;
-      ARMConstantPoolValue *CPV = ARMConstantPoolSymbol::Create(
-          *Context, "_GLOBAL_OFFSET_TABLE_", ARMPCLabelIndex, PCAdj);
-
-      unsigned Align = MF.getDataLayout().getPrefTypeAlignment(
-          Type::getInt32PtrTy(*Context));
-      unsigned Idx = MF.getConstantPool()->getConstantPoolIndex(CPV, Align);
-
-      MachineBasicBlock &FirstMBB = MF.front();
-      MachineBasicBlock::iterator MBBI = FirstMBB.begin();
-      DebugLoc DL = FirstMBB.findDebugLoc(MBBI);
-      unsigned TempReg =
-          MF.getRegInfo().createVirtualRegister(&ARM::rGPRRegClass);
-      unsigned Opc = STI.isThumb2() ? ARM::t2LDRpci : ARM::LDRcp;
-      const TargetInstrInfo &TII = *STI.getInstrInfo();
-      MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL,
-                                        TII.get(Opc), TempReg)
-                                .addConstantPoolIndex(Idx);
-      if (Opc == ARM::LDRcp)
-        MIB.addImm(0);
+/// ARMCGBR - Create Global Base Reg pass. This initializes the PIC
+/// global base register for ARM ELF.
+struct ARMCGBR : public MachineFunctionPass {
+  static char ID;
+  ARMCGBR() : MachineFunctionPass(ID) {}
+
+  bool runOnMachineFunction(MachineFunction &MF) override {
+    ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+    if (AFI->getGlobalBaseReg() == 0)
+      return false;
+    const ARMSubtarget &STI =
+        static_cast<const ARMSubtarget &>(MF.getSubtarget());
+    // Don't do this for Thumb1.
+    if (STI.isThumb1Only())
+      return false;
+
+    const TargetMachine &TM = MF.getTarget();
+    if (TM.getRelocationModel() != Reloc::PIC_)
+      return false;
+
+    LLVMContext *Context = &MF.getFunction()->getContext();
+    unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
+    unsigned PCAdj = STI.isThumb() ? 4 : 8;
+    ARMConstantPoolValue *CPV = ARMConstantPoolSymbol::Create(
+        *Context, "_GLOBAL_OFFSET_TABLE_", ARMPCLabelIndex, PCAdj);
+
+    unsigned Align =
+        MF.getDataLayout().getPrefTypeAlignment(Type::getInt32PtrTy(*Context));
+    unsigned Idx = MF.getConstantPool()->getConstantPoolIndex(CPV, Align);
+
+    MachineBasicBlock &FirstMBB = MF.front();
+    MachineBasicBlock::iterator MBBI = FirstMBB.begin();
+    DebugLoc DL = FirstMBB.findDebugLoc(MBBI);
+    unsigned TempReg =
+        MF.getRegInfo().createVirtualRegister(&ARM::rGPRRegClass);
+    unsigned Opc = STI.isThumb2() ? ARM::t2LDRpci : ARM::LDRcp;
+    const TargetInstrInfo &TII = *STI.getInstrInfo();
+    MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL, TII.get(Opc), TempReg)
+                                  .addConstantPoolIndex(Idx);
+    if (Opc == ARM::LDRcp)
+      MIB.addImm(0);
+    AddDefaultPred(MIB);
+
+    // Fix the GOT address by adding pc.
+    unsigned GlobalBaseReg = AFI->getGlobalBaseReg();
+    Opc = STI.isThumb2() ? ARM::tPICADD : ARM::PICADD;
+    MIB = BuildMI(FirstMBB, MBBI, DL, TII.get(Opc), GlobalBaseReg)
+              .addReg(TempReg)
+              .addImm(ARMPCLabelIndex);
+    if (Opc == ARM::PICADD)
       AddDefaultPred(MIB);
 
-      // Fix the GOT address by adding pc.
-      unsigned GlobalBaseReg = AFI->getGlobalBaseReg();
-      Opc = STI.isThumb2() ? ARM::tPICADD : ARM::PICADD;
-      MIB = BuildMI(FirstMBB, MBBI, DL, TII.get(Opc), GlobalBaseReg)
-                .addReg(TempReg)
-                .addImm(ARMPCLabelIndex);
-      if (Opc == ARM::PICADD)
-        AddDefaultPred(MIB);
-
-      return true;
-    }
-
-    const char *getPassName() const override {
-      return "ARM PIC Global Base Reg Initialization";
-    }
-
-    void getAnalysisUsage(AnalysisUsage &AU) const override {
-      AU.setPreservesCFG();
-      MachineFunctionPass::getAnalysisUsage(AU);
-    }
-  };
+    return true;
+  }
+
+  const char *getPassName() const override {
+    return "ARM PIC Global Base Reg Initialization";
+  }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+  }
+};
 }
 
 char ARMCGBR::ID = 0;
-FunctionPass*
-llvm::createARMGlobalBaseRegPass() { return new ARMCGBR(); }
+FunctionPass *llvm::createARMGlobalBaseRegPass() { return new ARMCGBR(); }