[llvm] r248172 - AMDGPU: Move copy handling under switch like other instructions
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 21 09:27:22 PDT 2015
Author: arsenm
Date: Mon Sep 21 11:27:22 2015
New Revision: 248172
URL: http://llvm.org/viewvc/llvm-project?rev=248172&view=rev
Log:
AMDGPU: Move copy handling under switch like other instructions
Modified:
llvm/trunk/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIFixSGPRCopies.cpp?rev=248172&r1=248171&r2=248172&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIFixSGPRCopies.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIFixSGPRCopies.cpp Mon Sep 21 11:27:22 2015
@@ -214,13 +214,18 @@ bool SIFixSGPRCopies::runOnMachineFuncti
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
MachineInstr &MI = *I;
- if (MI.getOpcode() == AMDGPU::COPY && isVGPRToSGPRCopy(MI, TRI, MRI)) {
- DEBUG(dbgs() << "Fixing VGPR -> SGPR copy: " << MI);
- TII->moveToVALU(MI);
- }
switch (MI.getOpcode()) {
- default: continue;
+ default:
+ continue;
+ case AMDGPU::COPY: {
+ if (isVGPRToSGPRCopy(MI, TRI, MRI)) {
+ DEBUG(dbgs() << "Fixing VGPR -> SGPR copy: " << MI);
+ TII->moveToVALU(MI);
+ }
+
+ break;
+ }
case AMDGPU::PHI: {
DEBUG(dbgs() << "Fixing PHI: " << MI);
More information about the llvm-commits
mailing list