[PATCH] D12680: [InstCombine] Added vector demanded bits support for SSE4A EXTRQ/INSERTQ instructions
David Majnemer via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 15 11:32:02 PDT 2015
majnemer added a subscriber: majnemer.
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Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:936-937
@@ +935,4 @@
+ auto Op1 = II->getArgOperand(1);
+ unsigned VWidth0 = cast<VectorType>(Op0->getType())->getNumElements();
+ unsigned VWidth1 = cast<VectorType>(Op1->getType())->getNumElements();
+ assert(VWidth0 == 2 && VWidth1 == 16 && "Unexpected operand sizes");
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I think it'd be more concise to use `Op->getType()->getVectorNumElements()`
Repository:
rL LLVM
http://reviews.llvm.org/D12680
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