[PATCH] D12881: [mips][microMIPS] Fix an issue with disassembling lwm32 instruction

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL247698: [mips][microMIPS] Fix an issue with disassembling lwm32 instruction (authored by zjovanovic).

Changed prior to commit:
  http://reviews.llvm.org/D12881?vs=34803&id=34805#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D12881

Files:
  llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
  llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt

Index: llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt
@@ -241,6 +241,8 @@
 
 0x44 0x20 0x08 0x50 # CHECK: lwm32 $16, $17, 8($4)
 
+0x3b 0x21 0x84 0x59 # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, -1660($27)
+
 0x44 0x20 0x08 0xd0 # CHECK: swm32 $16, $17, 8($4)
 
 0x04 0x22 0x08 0x90 # CHECK: swp $16, 8($4)
Index: llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
@@ -241,6 +241,8 @@
 
 0x20 0x44 0x50 0x08 # CHECK: lwm32 $16, $17, 8($4)
 
+0x21 0x3b 0x59 0x84 # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, -1660($27)
+
 0x20 0x44 0xd0 0x08 # CHECK: swm32 $16, $17, 8($4)
 
 0x22 0x04 0x90 0x08 # CHECK: swp $16, 8($4)
Index: llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -1915,7 +1915,7 @@
                                          uint64_t Address,
                                          const void *Decoder) {
   unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3, Mips::S4, Mips::S5,
-                     Mips::S6, Mips::FP};
+                     Mips::S6, Mips::S7, Mips::FP};
   unsigned RegNum;
 
   unsigned RegLst = fieldFromInstruction(Insn, 21, 5);


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