[PATCH] D10537: [mips] Add support for branch-likely pseudo-instructions
Zoran Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 14 08:10:39 PDT 2015
zoran.jovanovic accepted this revision.
zoran.jovanovic added a comment.
LGTM with a nit.
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Comment at: lib/Target/Mips/MipsInstrInfo.td:1747
@@ +1746,3 @@
+
+// Predicates are removed because instructions are matched regardless of
+// predicates, because PredicateControl was not in the hierarchy. This was
----------------
Please add "FIXME:" at the beginning of the comment.
================
Comment at: test/MC/Mips/mips32r6/invalid.s:20
@@ -18,1 +19,3 @@
break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+ // Following tests are temporarely disabled, until "PredicateControl not in hierarchy" problem is resolved
+ bltl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
----------------
Please add "FIXME:" at the beginning of the comment.
http://reviews.llvm.org/D10537
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