[PATCH] D10537: [mips] Add support for branch-likely pseudo-instructions
Srdjan Obucina via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 11 07:47:50 PDT 2015
obucina added a comment.
The same problem appeared with latest changes from http://reviews.llvm.org/D11675
All these have predicates, but not PredicateControl in hierarchy. Patch is not aplicable until this is fixed.
def SDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"div\t$rs, $rt">, ISA_MIPS1_NOT_32R6_64R6;
def UDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"divu\t$rs, $rt">, ISA_MIPS1_NOT_32R6_64R6;
def DSDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddiv\t$rs, $rt">, ISA_MIPS64_NOT_64R6;
def DUDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddivu\t$rs, $rt">, ISA_MIPS64_NOT_64R6;
http://reviews.llvm.org/D10537
More information about the llvm-commits
mailing list