[llvm] r247407 - Re-commit r247405: [mips] Add missing MIPS-I disassembler tests.

Fri Sep 11 05:59:04 PDT 2015

Author: dsanders
Date: Fri Sep 11 07:59:03 2015
New Revision: 247407

URL: http://llvm.org/viewvc/llvm-project?rev=247407&view=rev
Log:
Re-commit r247405: [mips] Add missing MIPS-I disassembler tests.

These tests were found by llvm-mc-fuzzer (see http://reviews.llvm.org/D12723)
and verified by checking the disassembler output is accepted by GAS.

The problematic tests from the previous commit have been moved to
valid-xfail.txt for now.

Also, give invalid instructions some coverage. invalid-xfail.txt contains
instructions that should be invalid but successfully disassemble.


Added:
    llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid-xfail.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid.txt
Modified:
    llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-xfail.txt

Added: llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid-xfail.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid-xfail.txt?rev=247407&view=auto
==============================================================================

--- llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid-xfail.txt (added)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid-xfail.txt Fri Sep 11 07:59:03 2015
@@ -0,0 +1,11 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
+# XFAIL: *
+
+# Start with a valid instruction. Otherwise llvm-mc gives up immediately.
+0x00 0x00 0x00 0x00
+
+# CHECK: .text
+0x45 0x08 0x14 0x02 # bc1f $fcc2, 20488 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028  # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x48 0x00 0x00 0x01 # mfc2 $zero, $0, 1 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x48 0x86 0x00 0x04 # mtc2 $6, $0, 4    # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding

Added: llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid.txt?rev=247407&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid.txt (added)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips1/invalid.txt Fri Sep 11 07:59:03 2015
@@ -0,0 +1,45 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips1 |& FileCheck %s
+
+# Start with a valid instruction. Otherwise llvm-mc gives up immediately.
+0x00 0x00 0x00 0x00
+
+0x00 0x11 0x00 0x0f # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x00 0x30 0xc0 0x42 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x00 0xab 0x09 0x4a # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x02 0x80 0x44 0xf0 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x02 0xc5 0x40 0x01 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x03 0x21 0x22 0xd5 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x03 0xa0 0x08 0x13 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x04 0x1c 0x63 0xee # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x40 0x3c 0x00 0x5d # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x42 0x02 0x00 0x27 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x42 0x1d 0x60 0x25 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x43 0xa2 0x00 0x18 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x44 0x20 0x86 0x06 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x44 0xe6 0xd0 0x04 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x45 0x03 0x80 0x00 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x45 0xe9 0xce 0x01 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x00 0x03 0x7a # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x00 0x1a 0xa5 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x00 0x78 0x4f # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x00 0xe5 0xe1 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x00 0xe6 0xcc # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x20 0x75 0x46 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x21 0xaa 0x00 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x21 0xaa 0x11 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x30 0x14 0xc1 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x46 0x3c 0xe8 0x3b # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x4c 0x00 0x3b 0x00 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x4d 0x09 0x92 0x01 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x4d 0x20 0x03 0x21 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x4d 0x20 0x03 0x8d # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x56 0x28 0x40 0x0d # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x5e 0x03 0xc8 0x13 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x73 0x11 0x00 0x01 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x75 0x68 0x90 0xf3 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0x7d 0x00 0xa0 0x71 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0xbe 0x03 0x46 0x40 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0xd8 0x07 0x44 0x00 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0xde 0xe3 0x06 0xef # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0xe0 0x46 0x3b 0x29 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
+0xf7 0x06 0xdc 0xef # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-mips1.txt?rev=247407&r1=247406&r2=247407&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-mips1.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-mips1.txt Fri Sep 11 07:59:03 2015
@@ -45,6 +45,9 @@
 0x04 0x11 0x14 0x9b # CHECK: bal 21104
 0x04 0xd0 0x14 0x9b # CHECK: bltzal $6, 21104
 0x04 0xd1 0x14 0x9b # CHECK: bgezal $6, 21104
+0x08 0x00 0x00 0x01 # CHECK: j 4
+0x09 0x33 0x00 0x2a # CHECK: j 80478376
+0x0b 0x2a 0xd1 0x44 # CHECK: j 212550928
 0x21 0x08 0xff 0xfe # CHECK: addi $8, $8, -2
 0x21 0x2d 0x66 0xd2 # CHECK: addi $13, $9, 26322
 0x21 0xad 0xe6 0x90 # CHECK: addi $13, $13, -6512

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-xfail.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-xfail.txt?rev=247407&r1=247406&r2=247407&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-xfail.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips1/valid-xfail.txt Fri Sep 11 07:59:03 2015
@@ -1,4 +1,12 @@
 # RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
 # XFAIL: *
+0x10 0x00 0x00 0x02 # CHECK: b 8
+0x10 0x00 0x00 0x05 # CHECK: b 20
+0x10 0x00 0x28 0x09 # CHECK: b 40996
+0x10 0x04 0x14 0xe1 # CHECK: beq $zero, $4, 21380
+0x11 0x00 0x00 0xc3 # CHECK: beqz $8, 780
+0x12 0x88 0x00 0x16 # CHECK: beq $20, $8, 88
+0x15 0x00 0x88 0x13 # CHECK: bnez $8, -122804
+0x15 0x8a 0x9f 0x89 # CHECK: bne $12, $10, -98780
 0xc2 0x44 0xe3 0x67 # CHECK: lwc0 $4, -7321($18)
 0xe2 0x64 0x49 0xd8 # CHECK: swc0 $4, 18904($19)


