[llvm] r247296 - Fix an undefined behavior introduces in r247234

[Steven Wu via llvm-commits]

Author: steven_wu
Date: Thu Sep 10 11:32:28 2015
New Revision: 247296

URL: http://llvm.org/viewvc/llvm-project?rev=247296&view=rev
Log:
Fix an undefined behavior introduces in r247234

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp?rev=247296&r1=247295&r2=247296&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Thu Sep 10 11:32:28 2015
@@ -646,7 +646,7 @@ bool AArch64DAGToDAGISel::SelectAddrMode
     if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
       int64_t RHSC = RHS->getSExtValue();
       unsigned Scale = Log2_32(Size);
-      if ((RHSC & (Size - 1)) == 0 && RHSC >= (-0x40 << Scale) &&
+      if ((RHSC & (Size - 1)) == 0 && RHSC >= -(0x40 << Scale) &&
           RHSC < (0x40 << Scale)) {
         Base = N.getOperand(0);
         if (Base.getOpcode() == ISD::FrameIndex) {