[PATCH] D10537: [mips] Add support for branch-likely pseudo-instructions

[Srdjan Obucina via llvm-commits]

obucina added a comment.

The problem expands, because now another instruction prevents adding PredicateControl to MIspAsmPseudoInst.

class MicroMipsR6Inst16 : PredicateControl {

  string DecoderNamespace = "MicroMipsR6";
  let InsnPredicates = [HasMicroMips32r6];

}

Workaround is to change

def : MipsInstAlias<"nop", (SLL_MMR6 ZERO, ZERO, 0), 1>, ISA_MICROMIPS32R6;
def B_MMR6_Pseudo : MipsAsmPseudoInst<(outs), (ins brtarget_mm:$offset),

                    !strconcat("b", "\t$offset")>,
  PredicateControl;

}

into

def : MipsInstAlias<"nop", (SLL_MMR6 ZERO, ZERO, 0), 1>, ISA_MICROMIPS32R6;
def B_MMR6_Pseudo : MipsAsmPseudoInst<(outs), (ins brtarget_mm:$offset),

                                      !strconcat("b", "\t$offset")> {
  string DecoderNamespace = "MicroMipsR6";

}

Is this good enough?


http://reviews.llvm.org/D10537