[PATCH] D11178: [mips][micromips] Implement ADDU16, AND16, ANDI16, NOT16, OR16, SLL16 and SRL16 instructions

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with some minor changes


================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:321-335
@@ -313,2 +320,17 @@
 
+class ADDU16_MMR6_DESC : ArithRMM16<"addu16", GPRMM16Opnd, 1, II_ADDU, add>,
+    MMR6Arch<"addu16">, MicroMipsR6Inst16;
+class AND16_MMR6_DESC : LogicRMM16<"and16", GPRMM16Opnd, II_AND, and>,
+    MMR6Arch<"and16">, MicroMipsR6Inst16;
+class ANDI16_MMR6_DESC : AndImmMM16<"andi16", GPRMM16Opnd, II_AND>,
+  MMR6Arch<"andi16">;
+class NOT16_MMR6_DESC : NotMM16<"not16", GPRMM16Opnd>, MMR6Arch<"not16">,
+    MicroMipsR6Inst16;
+class OR16_MMR6_DESC : LogicRMM16<"or16", GPRMM16Opnd, II_OR, or>,
+    MMR6Arch<"or16">, MicroMipsR6Inst16;
+class SLL16_MMR6_DESC : ShiftIMM16<"sll16", uimm3_shift, GPRMM16Opnd, II_SLL>,
+    MMR6Arch<"sll16">, MicroMipsR6Inst16;
+class SRL16_MMR6_DESC : ShiftIMM16<"srl16", uimm3_shift, GPRMM16Opnd, II_SRL>,
+    MMR6Arch<"srl16">, MicroMipsR6Inst16;
+
 //===----------------------------------------------------------------------===//
----------------
The *_FM should inherit fro MicroMipsR6Inst16 rather than the *_DESC
Also, Indentation.

================
Comment at: lib/Target/Mips/MicroMipsInstrFormats.td:40-45
@@ -39,2 +39,8 @@
 
+// Class used for separating microMIPSr6 and microMIPS (r3) instruction.
+// It can be used only on instructions that doesn't inherit PredicateControl.
+class MicroMipsNotMips32r6 : PredicateControl {
+  let InsnPredicates = [InMicroMips, NotMips32r6];
+}
+
 //===----------------------------------------------------------------------===//
----------------
Please define this with the other adjectives in MipsInstrInfo.td and follow the naming convention used by the others (e.g. ISA_MICROMIPS_NOT_32R6_64R6)

================
Comment at: lib/Target/Mips/MicroMipsInstrInfo.td:556-570
@@ -554,4 +555,17 @@
 
 def ADDU16_MM : ArithRMM16<"addu16", GPRMM16Opnd, 1, II_ADDU, add>,
-                ARITH_FM_MM16<0>;
+  ARITH_FM_MM16<0>, MicroMipsNotMips32r6;
+def AND16_MM : LogicRMM16<"and16", GPRMM16Opnd, II_AND, and>,
+  LOGIC_FM_MM16<0x2>, MicroMipsNotMips32r6;
+def ANDI16_MM : AndImmMM16<"andi16", GPRMM16Opnd, II_AND>, ANDI_FM_MM16<0x0b>,
+  MicroMipsNotMips32r6;
+def NOT16_MM : NotMM16<"not16", GPRMM16Opnd>, LOGIC_FM_MM16<0x0>,
+  MicroMipsNotMips32r6;
+def OR16_MM : LogicRMM16<"or16", GPRMM16Opnd, II_OR, or>, LOGIC_FM_MM16<0x3>,
+  MicroMipsNotMips32r6;
+def SLL16_MM : ShiftIMM16<"sll16", uimm3_shift, GPRMM16Opnd, II_SLL>,
+  SHIFT_FM_MM16<0>, MicroMipsNotMips32r6;
+def SRL16_MM : ShiftIMM16<"srl16", uimm3_shift, GPRMM16Opnd, II_SRL>,
+  SHIFT_FM_MM16<1>, MicroMipsNotMips32r6;
+
 def SUBU16_MM : ArithRMM16<"subu16", GPRMM16Opnd, 0, II_SUBU, sub>,
----------------
Indentation


http://reviews.llvm.org/D11178