[PATCH] D11139: [mips] Added support for various EVA ASE instructions.

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with a minor change to the predicates.


================
Comment at: lib/Target/Mips/MipsEVAInstrInfo.td:175-181
@@ +174,9 @@
+/// load/store left/right EVA
+let EncodingPredicates = []<Predicate>,
+    AdditionalPredicates = [NotInMicroMips, HasEVA] in {
+def LWLE    : LWLE_ENC, LWLE_DESC, ISA_MIPS1_NOT_32R6_64R6;
+def LWRE    : LWRE_ENC, LWRE_DESC, ISA_MIPS1_NOT_32R6_64R6;
+def SWLE    : SWLE_ENC, SWLE_DESC, ISA_MIPS1_NOT_32R6_64R6;
+def SWRE    : SWRE_ENC, SWRE_DESC, ISA_MIPS1_NOT_32R6_64R6;
+}
+
----------------
HasEVA doesn't belong in AdditionalPredicates. Define a INSN_EVA_NOT_32R6_64R6 and use that instead of ISA_MIPS1_NOT_32R6_64R6.

Also, drop the assignment to EncodingPredicates. There was a FIXME on the LWL/LWR/SWL/SWR indicating that it was probably a bug.

================
Comment at: lib/Target/Mips/MipsEVAInstrInfo.td:184
@@ +183,3 @@
+/// Load-linked EVA, Store-conditional EVA
+let EncodingPredicates = []<Predicate>,
+    AdditionalPredicates = [NotInMicroMips] in {
----------------
Likewise, drop this EncodingPredicates too.


http://reviews.llvm.org/D11139