[PATCH] D12635: merge vector stores into wider vector stores and fix AArch64 misaligned access TLI hook (PR21711)

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 4 08:36:37 PDT 2015


spatel created this revision.
spatel added reviewers: qcolombet, hfinkel, ahatanak, jyknight, t.p.northover.
spatel added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.

This is a redo of D7208 ( r227242 - http://llvm.org/viewvc/llvm-project?view=revision&revision=227242 ).

The patch was reverted because an AArch64 target could infinite loop after the change in DAGCombiner to merge vector stores. That happened because AArch64's allowsMisalignedMemoryAccesses() wasn't telling the truth. It reported all unaligned memory accesses as fast, but then split some 128-bit unaligned accesses up in performSTORECombine() because they are slow.

This patch attempts to fix the problem in allowsMisalignedMemoryAccesses() while preserving existing lowering behavior for AArch64.

http://reviews.llvm.org/D12635

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/merge-store.ll
  test/CodeGen/X86/MergeConsecutiveStores.ll

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