[llvm] r246541 - [ARM] Turn on by default interleaved access vectorization

Evgenii Stepanov via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 2 13:51:49 PDT 2015


I'm pretty sure it is this patch, as I see the crash locally and it
goes away when this patch is reverted.

Yes, self-hosting.

On Wed, Sep 2, 2015 at 1:42 PM, Renato Golin <renato.golin at linaro.org> wrote:
> Hi Evgenii,
>
> It's not this patch, it's probably a Clang bug. Are you self-hosting?
>
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/3284/steps/build%20stage%202/logs/stdio
>
> cheers,
> --renato
>
> On 2 September 2015 at 21:31, Evgenii Stepanov via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>> Hi,
>>
>> this is breaking bootstrap on armv7-linux-androideabi.
>>
>> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/20039/steps/build%20llvm-symbolizer%20android%2Farm/logs/stdio
>>
>> I'm working on a minimized test case.
>> Please consider reverting.
>>
>> On Tue, Sep 1, 2015 at 4:19 AM, Silviu Baranga via llvm-commits
>> <llvm-commits at lists.llvm.org> wrote:
>>> Author: sbaranga
>>> Date: Tue Sep  1 06:19:15 2015
>>> New Revision: 246541
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=246541&view=rev
>>> Log:
>>> [ARM] Turn on by default interleaved access vectorization
>>>
>>> Summary:
>>> This change turns on by default interleaved access vectorization on ARM,
>>> as it has shown to be beneficial on ARM.
>>>
>>> Reviewers: rengolin
>>>
>>> Subscribers: aemerson, llvm-commits, rengolin
>>>
>>> Differential Revision: http://reviews.llvm.org/D12146
>>>
>>> Modified:
>>>     llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h
>>>     llvm/trunk/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
>>>
>>> Modified: llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h?rev=246541&r1=246540&r2=246541&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h (original)
>>> +++ llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h Tue Sep  1 06:19:15 2015
>>> @@ -52,6 +52,8 @@ public:
>>>        : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
>>>          TLI(std::move(Arg.TLI)) {}
>>>
>>> +  bool enableInterleavedAccessVectorization() { return true; }
>>> +
>>>    /// \name Scalar TTI Implementations
>>>    /// @{
>>>
>>>
>>> Modified: llvm/trunk/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll?rev=246541&r1=246540&r2=246541&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll (original)
>>> +++ llvm/trunk/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll Tue Sep  1 06:19:15 2015
>>> @@ -1,4 +1,4 @@
>>> -; RUN: opt -S -debug-only=loop-vectorize -loop-vectorize -instcombine -enable-interleaved-mem-accesses=true  < %s 2>&1 | FileCheck %s
>>> +; RUN: opt -S -debug-only=loop-vectorize -loop-vectorize -instcombine  < %s 2>&1 | FileCheck %s
>>>  ; REQUIRES: asserts
>>>
>>>  target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
>>>
>>>
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