[PATCH] D12425: [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.

[James Molloy via llvm-commits]

jmolloy requested changes to this revision.
jmolloy added a comment.
This revision now requires changes to proceed.

Hi Ahmed,

I'd really prefer this to be predicated on a new feature. I'm happy for the feature to be enabled by default though.

Cheers,

James


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:405
@@ +404,3 @@
+  // but all of the A-class CPUs we support have it.
+  setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal);
+
----------------
I'd really prefer that this is predicated on a feature.


http://reviews.llvm.org/D12425