[PATCH] D12465: AMDGPU/SI: Add verifier check for exec reads
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 28 18:30:03 PDT 2015
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.
Make sure we aren't accidentally not setting these in the instruction definitions.
http://reviews.llvm.org/D12465
Files:
lib/Target/AMDGPU/SIInstrInfo.cpp
Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1416,6 +1416,16 @@
}
}
+ // Make sure we aren't losing exec uses in the td files. This mostly requires
+ // being careful when using let Uses to try to add other use registers.
+ if (!isBuiltinOpcode(Opcode) && !isSALU(Opcode) && !isSMRD(Opcode)) {
+ const MachineOperand *Exec = MI->findRegisterUseOperand(AMDGPU::EXEC);
+ if (!Exec || !Exec->isImplicit()) {
+ ErrInfo = "VALU instruction does not implicitly read exec mask";
+ return false;
+ }
+ }
+
return true;
}
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