[PATCH] D12279: [mips][microMIPS] Implement ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

[Daniel Sanders via llvm-commits]

dsanders added a comment.

In http://reviews.llvm.org/D12279#233031, @zbuljan wrote:

> We only added tests in previous patch because opcodes of microMIPSR6 instructions ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP are identical to their microMIPS(R3) equivalents and all tests have passed.
>  Later, we made another patch that changes decoder namespace.
>  If we commit that patch, disassembler tests for ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions would fail.


I'm not sure I've seen that patch, could you give me a link to it? I'm not keen to duplicate instruction definitions if we don't have to.

Generally speaking, it's preferable to avoid needing fixup commits (they complicate reverts) so it sounds like this patch (http://reviews.llvm.org/D12279) should be folded into the one you mention and both patches should be committed in a single commit.


http://reviews.llvm.org/D12279