[PATCH] D12202: Add Support for Small Size Reductions

[Matthew Simpson via llvm-commits]

mssimpso added a comment.

James,

Thanks for the comments. For the non-reduction case, there is no legality issue, so I was assuming we would just ignore the appropriate instructions in the cost model. However, if InstCombine isn't always capable of performing the rewrite, this is a problem. I really like the idea of using the demanded bits analysis. In the ideal case, I think the vectorizer would widen each instruction to the appropriate bit width and VF without depending on InstCombine to rewrite things. I would really like to see your patch when it's ready!

Aside from code generation, there are other similarities with the reduction and non-reduction cases (e.g., telling the cost model to ignore the cast instructions). For the legality of the reductions, we still need to look through the AND instructions, but I think this could probably be made much more general.

What are your thoughts on splitting this work up into three separate components? (1) changes to RecurenceDescriptor for legalizing the reduction, (2) changes to the cost model for ignoring the cast instructions, and (3) changes to the code generator for creating the correct types. (2) and (3) would presumably be common to the reduction and non-reduction cases and could use the demanded bits analysis if we decide to go that route. We could also split up the work to avoid duplication.


http://reviews.llvm.org/D12202