[PATCH] D12235: [sanitizers] Add DFSan support for AArch64 42-bit VMA
Adhemerval Zanella via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 21 06:36:55 PDT 2015
zatrazz created this revision.
zatrazz added reviewers: t.p.northover, pcc, aemerson, rengolin.
zatrazz added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.
This patch adds support for dfsan on aarch64-linux with 42-bit VMA
(current default config for 64K pagesize kernels). The support is
enabled by defining the SANITIZER_AARCH64_VMA to 42 at build time
for both clang/llvm and compiler-rt. The default VMA is 39 bits.
http://reviews.llvm.org/D12235
Files:
lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
Index: lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
===================================================================
--- lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
+++ lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
@@ -72,6 +72,16 @@
using namespace llvm;
+// VMA size definition for architecture that support multiple sizes.
+// AArch64 has 3 VMA sizes: 39, 42 and 48.
+#ifndef SANITIZER_AARCH64_VMA
+# define SANITIZER_AARCH64_VMA 39
+#else
+# if SANITIZER_AARCH64_VMA != 39 && SANITIZER_AARCH64_VMA != 42
+# error "invalid SANITIZER_AARCH64_VMA size"
+# endif
+#endif
+
// The -dfsan-preserve-alignment flag controls whether this pass assumes that
// alignment requirements provided by the input IR are correct. For example,
// if the input IR contains a load with alignment 8, this flag will cause
@@ -437,7 +447,11 @@
else if (IsMIPS64)
ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0xF000000000LL);
else if (IsAArch64)
+#if SANITIZER_AARCH64_VMA == 39
ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0x7800000000LL);
+#else
+ ShadowPtrMask = ConstantInt::getSigned(IntptrTy, ~0x3c000000000LL);
+#endif
else
report_fatal_error("unsupported triple");
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