[PATCH] D12089: Implement __aeabi_c{d,f}{cmpeq,cmple,rcmple}.

Josh Gao via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 19 11:27:06 PDT 2015


jmgao added inline comments.

================
Comment at: lib/builtins/arm/aeabi_cdcmp.S:75
@@ +74,3 @@
+        // Restore the argument registers
+        pop {r0, r1, r2, r3}
+
----------------
compnerd wrote:
> jmgao wrote:
> > How about this?
> > 
> > ```
> > __aeabi_cdcmple:
> >     push {r0-r4, lr}
> > 
> >     bl __aeabi_dcmplt
> >     cmp r0, #1
> >     moveq r4, #0
> >     beq 1f
> > 
> >     ldm sp, {r0-r3}
> >     bl __aeabi_dcmpeq
> >     cmp r0, #1
> >     moveq r4, #(APSR_C | APSR_Z)
> >     movne r4, #(APSR_C)
> > 1:
> >     msr CPSR_f, r4
> >     pop {r0-r4, pc} 
> > ```
> I like the idea of the moveq/movne ... though, Im not sure I understand the purpose of using r4 rather than ip which is already a scratch register.  The pop {pc} has the issue that Renato pointed out wrt older chips, (the stack savings are probably not important).
Oh yeah, using ip is fine here. I originally had `orr r4, r4, #APSR_C; orreq r4, r4, #APSR_Z` instead of the direct mov.

I added a macro for doing either `pop {pc}` or `pop {ip}; bx ip`


http://reviews.llvm.org/D12089





More information about the llvm-commits mailing list