[PATCH] D12146: [ARM] Turn on by default interleaved access vectorization

[silviu.baranga@arm.com via llvm-commits]

sbaranga created this revision.
sbaranga added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.

This change turns on by default interleaved access vectorization on ARM,
as it has shown to be beneficial on ARM.

http://reviews.llvm.org/D12146

Files:
  lib/Target/ARM/ARMTargetTransformInfo.h
  test/Transforms/LoopVectorize/ARM/interleaved_cost.ll

Index: test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
===================================================================
--- test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
+++ test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -debug-only=loop-vectorize -loop-vectorize -instcombine -enable-interleaved-mem-accesses=true  < %s 2>&1 | FileCheck %s
+; RUN: opt -S -debug-only=loop-vectorize -loop-vectorize -instcombine  < %s 2>&1 | FileCheck %s
 ; REQUIRES: asserts
 
 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
Index: lib/Target/ARM/ARMTargetTransformInfo.h
===================================================================
--- lib/Target/ARM/ARMTargetTransformInfo.h
+++ lib/Target/ARM/ARMTargetTransformInfo.h
@@ -52,6 +52,8 @@
       : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
         TLI(std::move(Arg.TLI)) {}
 
+  bool enableInterleavedAccessVectorization() { return true; }
+
   /// \name Scalar TTI Implementations
   /// @{
 


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