[PATCH] D12082: [X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize

[Michael Kuperstein via llvm-commits]

mkuper created this revision.
mkuper added reviewers: hfinkel, spatel, RKSimon.
mkuper added subscribers: llvm-commits, zansari.

There are some cases where the mul sequence is smaller, but for the most part, using a div is preferable.

This does not apply to vectors, since x86 doesn't have vector idiv, and a vector mul/shifts sequence ought to be smaller than a scalarized division.
(Of course, this really depends on the type, since we may not have vector muls/shifts either, but I'd rather just keep the existing behavior for the vector case)

http://reviews.llvm.org/D12082

Files:
  include/llvm/Target/TargetLowering.h
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/divide-by-constant.ll
  test/CodeGen/X86/vec_sdiv_to_shift.ll

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