[PATCH] D12053: [Polly] Workaround for SDiv/SRem referenced from SCEVExpander
Tobias Grosser via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 16 13:43:23 PDT 2015
Very cool, I think this makes sense.
Michael, as you had a close look into this already, I would be interested what you think
about this approach?
Best,
Tobias
> jdoerfert added a comment.
>
> In http://reviews.llvm.org/D12053#225339, @grosser wrote:
>
>> codgenSCEV(SCEV S)
>>
>> 1. Scan S for SCEV Unknowns X that refer to instructions in SCoP
>> 2. for each operand Op of X: a) get SCEV of Op b) codegenSCEV(SCEV of Op) c) create new instruction that uses the newly code generated operands as input
>> 3. Replace all X with new instructions
>> 4. Only now SCEVExpand the SCEV (after we know it has no problematic SCEUnknowns any more)
>>
>> Maybe this gives you some inspiration of how to go ahead.
>
>
> I was actually thinking something similar and apperently it works for the two test cases at hand and regardless where (in which kind of SCEV) the SDiv/SRem are hiding. See: http://reviews.llvm.org/D12066
>
>
> ================
> Comment at: lib/CodeGen/IslNodeBuilder.cpp:58
> @@ -53,1 +57,3 @@
> +}
> +
> __isl_give isl_ast_expr *
> ----------------
> jdoerfert wrote:
>> Meinersbur wrote:
>>> jdoerfert wrote:
>>>> Why do we need this?
>>> LLVM defines SDivOperator, but not SRemOperator
>> Why don't you cast to SRem and SDiv instructions instead of operators?
> I got it,.. you would need to use the opcode instead.
>
>
> http://reviews.llvm.org/D12053
>
>
>
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