[llvm] r245163 - add test case to show current codegen

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Sat Aug 15 11:49:50 2015
New Revision: 245163

URL: http://llvm.org/viewvc/llvm-project?rev=245163&view=rev
Log:
add test case to show current codegen

Modified:
    llvm/trunk/test/CodeGen/X86/machine-combiner.ll

Modified: llvm/trunk/test/CodeGen/X86/machine-combiner.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-combiner.ll?rev=245163&r1=245162&r2=245163&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-combiner.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-combiner.ll Sat Aug 15 11:49:50 2015
@@ -358,3 +358,27 @@ define <4 x double> @reassociate_muls_v4
   ret <4 x double> %t2
 }
 
+; TODO: Verify that SSE and AVX scalar single-precision minimum ops are reassociated.
+
+define float @reassociate_mins_single(float %x0, float %x1, float %x2, float %x3) {
+; SSE-LABEL: reassociate_mins_single:
+; SSE:       # BB#0:
+; SSE-NEXT:    divss %xmm1, %xmm0
+; SSE-NEXT:    minss %xmm2, %xmm0
+; SSE-NEXT:    minss %xmm3, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: reassociate_mins_single:
+; AVX:       # BB#0:
+; AVX-NEXT:    vdivss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vminss %xmm0, %xmm2, %xmm0
+; AVX-NEXT:    vminss %xmm0, %xmm3, %xmm0
+; AVX-NEXT:    retq
+  %t0 = fdiv float %x0, %x1
+  %cmp1 = fcmp olt float %x2, %t0
+  %sel1 = select i1 %cmp1, float %x2, float %t0
+  %cmp2 = fcmp olt float %x3, %sel1
+  %sel2 = select i1 %cmp2, float %x3, float %sel1
+  ret float %sel2
+}
+