[PATCH] D11933: Extending debug ranges

[Adrian Prantl via llvm-commits]

aprantl added a comment.

Have you had a chance to benchmark the new pass? (Compiling clang with optimizations+debug info would be a good start)

Here's a test case involving constants to play with:

  void g(int *);
  int f() {
    int x = 23;
    g(&x);
    if (x == 42)
      ++x;
    return x;
  }

Compiled with -O1 I get:

  define i32 @f() #0 {
  entry:
    %x = alloca i32, align 4
    %0 = bitcast i32* %x to i8*, !dbg !14
    call void @llvm.lifetime.start(i64 4, i8* %0) #1, !dbg !14
    tail call void @llvm.dbg.value(metadata i32 23, i64 0, metadata !9, metadata !15), !dbg !16
    store i32 23, i32* %x, align 4, !dbg !16, !tbaa !17
    tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !15), !dbg !16
    call void @g(i32* nonnull %x) #1, !dbg !21
    call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !15), !dbg !16
    %1 = load i32, i32* %x, align 4, !dbg !22, !tbaa !17
    %cmp = icmp eq i32 %1, 42, !dbg !24
    br i1 %cmp, label %if.then, label %if.end, !dbg !25
  
  if.then:                                          ; preds = %entry
    %inc = add nsw i32 %1, 1, !dbg !26
    call void @llvm.dbg.value(metadata i32 %inc, i64 0, metadata !9, metadata !15), !dbg !16
    store i32 %inc, i32* %x, align 4, !dbg !26, !tbaa !17
    br label %if.end, !dbg !26
  
  if.end:                                           ; preds = %if.then, %entry
    call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !15), !dbg !16
    %2 = load i32, i32* %x, align 4, !dbg !27, !tbaa !17
    call void @llvm.lifetime.end(i64 4, i8* %0) #1, !dbg !28
    ret i32 %2, !dbg !29
  }

and then

  # *** IR Dump After DBG_VALUE Fixup Pass ***:
  # Machine code for function f: Post SSA
  Frame Objects:
    fi#-1: size=8, align=16, fixed, at location [SP-8]
    fi#0: size=4, align=4, at location [SP-12]
  
  BB#0: derived from LLVM BB %entry
      Live Ins: %RBP
  	PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>; flags: FrameSetup
  	CFI_INSTRUCTION <call frame instruction>
  	CFI_INSTRUCTION <call frame instruction>
  	%RBP<def> = MOV64rr %RSP; flags: FrameSetup
  	CFI_INSTRUCTION <call frame instruction>
  	%RSP<def,tied1> = SUB64ri8 %RSP<tied0>, 16, %EFLAGS<imp-def,dead>; flags: FrameSetup dbg:var.c:3:7
  	DBG_VALUE 23, 0, !"x", <!15>; line no:3
  	MOV32mi %RBP, 1, %noreg, -4, %noreg, 23; mem:ST4[%x](tbaa=!18) dbg:var.c:3:7
  	%RDI<def> = LEA64r %RBP, 1, %noreg, -4, %noreg
  	DBG_VALUE %RDI, 0, !"x", <!15>; line no:3 indirect
  	CALL64pcrel32 <ga:@g>, <regmask>, %RSP<imp-use>, %RDI<imp-use>, %RSP<imp-def>; dbg:var.c:4:3
  	%EAX<def> = MOV32rm %RBP, 1, %noreg, -4, %noreg; mem:LD4[%x](tbaa=!18) dbg:var.c:5:7
  	CMP32ri8 %EAX, 42, %EFLAGS<imp-def>; dbg:var.c:5:7
  	JNE_1 <BB#2>, %EFLAGS<imp-use>
      Successors according to CFG: BB#1(16) BB#2(16)
  
  BB#1: derived from LLVM BB %if.then
      Live Ins: %EAX %RBP
      Predecessors according to CFG: BB#0
  	DBG_VALUE %RDI, 0, !"x", <!15>; line no:3 indirect
  	DBG_VALUE 23, 0, !"x", <!15>; line no:3
  	%EAX<def,tied1> = INC32r %EAX<kill,tied0>, %EFLAGS<imp-def,dead>; dbg:var.c:6:5
  	DBG_VALUE %EAX, %noreg, !"x", <!15>; line no:3
  	MOV32mr %RBP, 1, %noreg, -4, %noreg, %EAX<kill>; mem:ST4[%x](tbaa=!18) dbg:var.c:6:5
      Successors according to CFG: BB#2
  
  BB#2: derived from LLVM BB %if.end
      Live Ins: %RBP
      Predecessors according to CFG: BB#0 BB#1
  	DBG_VALUE 23, 0, !"x", <!15>; line no:3
  	%EAX<def> = MOV32rm %RBP, 1, %noreg, -4, %noreg; mem:LD4[%x](tbaa=!18) dbg:var.c:7:10
  	%RSP<def,tied1> = ADD64ri8 %RSP<tied0>, 16, %EFLAGS<imp-def,dead>; dbg:var.c:7:3
  	%RBP<def> = POP64r %RSP<imp-def>, %RSP<imp-use>; dbg:var.c:7:3
  	RETQ %EAX; dbg:var.c:7:3
  
  # End machine code for function f.

Note how the constant value of x is propagated into the last basic block.


http://reviews.llvm.org/D11933