[PATCH] D12007: [AMDGPU] Use the general SMAX/SMIN/UMAX/UMIN pattern matching and remove the AMDGPU implementation

[James Molloy via llvm-commits]

Hi Matt,

Yes; min/max is now matched at the IR level. I know there is the
possibility of this approach missing some min/max's exposed at the
DAGCombine level, but that could be fixed with point fixes if a common
pattern emerges.

The advantage of matching at the SDAGBuilder stage is that all the (fairly
complex) logic gets kept in one place. We've now (or will have by the end
of the week) removed 4 separate implementations of matching mins/maxs, all
dealing with the subtleties of
orderedness/unorderedness/signed-zeroes/NaNs. I hope that in the long run
this new approach will be more maintainable, and I'm sure we can patch up
any regressions in DAGCombine.

James

On Thu, 13 Aug 2015 at 20:27 Matt Arsenault via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> arsenm accepted this revision.
> arsenm added a comment.
> This revision is now accepted and ready to land.
>
> I think I tried to do this before, but hit a regression where a min/max
> pattern showed up during lowering since the generic min / max was only
> formed during SelectionDAGBuilder. I wasn't sure why min/max was only being
> matched so early. Was this fixed / is min/max matched in DAGCombiner now?
>
>
> Repository:
>   rL LLVM
>
> http://reviews.llvm.org/D12007
>
>
>
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