[llvm] r244913 - [AArch64] Small rejig of fmax tests, NFCI.

James Molloy via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 13 10:28:10 PDT 2015


Author: jamesm
Date: Thu Aug 13 12:28:10 2015
New Revision: 244913

URL: http://llvm.org/viewvc/llvm-project?rev=244913&view=rev
Log:
[AArch64] Small rejig of fmax tests, NFCI.

These tests relied on -enable-no-nans-fp-math, whereas soon they'll take their no-nans hint
from the FCMP instruction itself, so split the no-nans stuff out into its own test.

Also do a slight rejig of instruction order. The old FMIN/MAX backend matching had to deal with looking through casts, which it never did particularly well. Now, instcombine will recognize such patterns and canonicalize the cast outside the select. So modify the test inputs to assume that instcombine has already run.

Added:
    llvm/trunk/test/CodeGen/AArch64/arm64-fmax-safe.ll
      - copied, changed from r244901, llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll
Modified:
    llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll

Copied: llvm/trunk/test/CodeGen/AArch64/arm64-fmax-safe.ll (from r244901, llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fmax-safe.ll?p2=llvm/trunk/test/CodeGen/AArch64/arm64-fmax-safe.ll&p1=llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll&r1=244901&r2=244913&rev=244913&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-fmax-safe.ll Thu Aug 13 12:28:10 2015
@@ -1,49 +1,41 @@
-; RUN: llc -march=arm64 -enable-no-nans-fp-math < %s | FileCheck %s
-; RUN: llc -march=arm64 < %s | FileCheck %s --check-prefix=CHECK-SAFE
+; RUN: llc -march=arm64 < %s | FileCheck %s
 
 define double @test_direct(float %in) {
 ; CHECK-LABEL: test_direct:
-; CHECK-SAFE-LABEL: test_direct:
   %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double 0.000000e+00, double %longer
-  ret double %val
+  %val = select i1 %cmp, float 0.000000e+00, float %in
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmax
-; CHECK-SAFE: fmax
 }
 
 define double @test_cross(float %in) {
 ; CHECK-LABEL: test_cross:
-; CHECK-SAFE-LABEL: test_cross:
   %cmp = fcmp ult float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double %longer, double 0.000000e+00
-  ret double %val
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmin
-; CHECK-SAFE: fmin
 }
 
 ; Same as previous, but with ordered comparison;
 ; can't be converted in safe-math mode.
 define double @test_cross_fail_nan(float %in) {
 ; CHECK-LABEL: test_cross_fail_nan:
-; CHECK-SAFE-LABEL: test_cross_fail_nan:
   %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double %longer, double 0.000000e+00
-  ret double %val
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
 
-; CHECK: fmin
-; CHECK-SAFE: fcsel d0, d1, d0, mi
+; CHECK: fcsel s0, s0, s1, mi
 }
 
 ; This isn't a min or a max, but passes the first condition for swapping the
 ; results. Make sure they're put back before we resort to the normal fcsel.
 define float @test_cross_fail(float %lhs, float %rhs) {
 ; CHECK-LABEL: test_cross_fail:
-; CHECK-SAFE-LABEL: test_cross_fail:
   %tst = fcmp une float %lhs, %rhs
   %res = select i1 %tst, float %rhs, float %lhs
   ret float %res
@@ -51,7 +43,6 @@ define float @test_cross_fail(float %lhs
   ; The register allocator would have to decide to be deliberately obtuse before
   ; other register were used.
 ; CHECK: fcsel s0, s1, s0, ne
-; CHECK-SAFE: fcsel s0, s1, s0, ne
 }
 
 ; Make sure the transformation isn't triggered for integers

Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll?rev=244913&r1=244912&r2=244913&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-fmax.ll Thu Aug 13 12:28:10 2015
@@ -1,57 +1,48 @@
 ; RUN: llc -march=arm64 -enable-no-nans-fp-math < %s | FileCheck %s
-; RUN: llc -march=arm64 < %s | FileCheck %s --check-prefix=CHECK-SAFE
 
 define double @test_direct(float %in) {
 ; CHECK-LABEL: test_direct:
-; CHECK-SAFE-LABEL: test_direct:
-  %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double 0.000000e+00, double %longer
-  ret double %val
+  %cmp = fcmp nnan olt float %in, 0.000000e+00
+  %val = select i1 %cmp, float 0.000000e+00, float %in
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmax
-; CHECK-SAFE: fmax
 }
 
 define double @test_cross(float %in) {
 ; CHECK-LABEL: test_cross:
-; CHECK-SAFE-LABEL: test_cross:
-  %cmp = fcmp ult float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double %longer, double 0.000000e+00
-  ret double %val
+  %cmp = fcmp nnan ult float %in, 0.000000e+00
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmin
-; CHECK-SAFE: fmin
 }
 
 ; Same as previous, but with ordered comparison;
 ; can't be converted in safe-math mode.
 define double @test_cross_fail_nan(float %in) {
 ; CHECK-LABEL: test_cross_fail_nan:
-; CHECK-SAFE-LABEL: test_cross_fail_nan:
-  %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double %longer, double 0.000000e+00
-  ret double %val
+  %cmp = fcmp nnan olt float %in, 0.000000e+00
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmin
-; CHECK-SAFE: fcsel d0, d1, d0, mi
 }
 
 ; This isn't a min or a max, but passes the first condition for swapping the
 ; results. Make sure they're put back before we resort to the normal fcsel.
 define float @test_cross_fail(float %lhs, float %rhs) {
 ; CHECK-LABEL: test_cross_fail:
-; CHECK-SAFE-LABEL: test_cross_fail:
-  %tst = fcmp une float %lhs, %rhs
+  %tst = fcmp nnan une float %lhs, %rhs
   %res = select i1 %tst, float %rhs, float %lhs
   ret float %res
 
   ; The register allocator would have to decide to be deliberately obtuse before
   ; other register were used.
 ; CHECK: fcsel s0, s1, s0, ne
-; CHECK-SAFE: fcsel s0, s1, s0, ne
 }
 
 ; Make sure the transformation isn't triggered for integers




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