[PATCH] D11904: [X86] Disable mul -> shl + lea combine when compiling for minsize

[Michael Kuperstein via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL244740: [X86] Disable mul -> shl + lea combine when compiling for minsize (authored by mkuper).

Changed prior to commit:
  http://reviews.llvm.org/D11904?vs=31667&id=31926#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D11904

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/imul.ll

Index: llvm/trunk/test/CodeGen/X86/imul.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/imul.ll
+++ llvm/trunk/test/CodeGen/X86/imul.ll
@@ -108,3 +108,21 @@
     %mul = mul i64 %A, 40
     ret i64 %mul
 }
+
+define i32 @mul4_32_minsize(i32 %A) minsize {
+; X64-LABEL: mul4_32_minsize:
+; X64: leal
+; X86-LABEL: mul4_32_minsize:
+; X86: shll
+    %mul = mul i32 %A, 4
+    ret i32 %mul
+}
+
+define i32 @mul40_32_minsize(i32 %A) minsize {
+; X64-LABEL: mul40_32_minsize:
+; X64: imull
+; X86-LABEL: mul40_32_minsize:
+; X86: imull
+    %mul = mul i32 %A, 40
+    ret i32 %mul
+}
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -23436,6 +23436,10 @@
 /// LEA + SHL, LEA + LEA.
 static SDValue PerformMulCombine(SDNode *N, SelectionDAG &DAG,
                                  TargetLowering::DAGCombinerInfo &DCI) {
+  // An imul is usually smaller than the alternative sequence.
+  if (DAG.getMachineFunction().getFunction()->optForMinSize())
+    return SDValue();
+
   if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
     return SDValue();
 


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