[PATCH] D10869: [mips][microMIPS] Implement SW and SWE instructions

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 03:15:58 PDT 2015


dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

It will LGTM with a few spelling nits fixed.


================
Comment at: lib/Target/Mips/MicroMips32r6InstrFormats.td:275-303
@@ -274,1 +274,30 @@
 }
+
+class LW_FM_MMR6<string instr_asm, bits<6> op> : MMR6Arch<instr_asm> {
+  bits<5> rt;
+  bits<21> addr;
+
+  bits<32> Inst;
+
+  let Inst{31-26} = op;
+  let Inst{25-21} = rt;
+  let Inst{20-16} = addr{20-16};
+  let Inst{15-0}  = addr{15-0};
+}
+
+class LHUE_FM_MMR6<string instr_asm, bits<6> op, bits<4> fmt, bits<3> funct>
+    : MMR6Arch<instr_asm> {
+  bits<5> rt;
+  bits<21> addr;
+  bits<5> base = addr{20-16};
+  bits<9> offset = addr{8-0};
+
+  bits<32> Inst;
+
+  let Inst{31-26} = op;
+  let Inst{25-21} = rt;
+  let Inst{20-16} = base;
+  let Inst{15-12} = fmt;
+  let Inst{11-9} = funct;
+  let Inst{8-0}  = offset;
+}
----------------
The content looks right for SW and SWE but it's rather confusing to call them LW_... and LHUE_... when you are using them with SW and SWE.

Please name them after the major opcode instead. The convention we are trying to use for new work is <major-opcode>_<misc>_FM where <misc> is a disambiguating string when we need it such as for POOL32C which has several formats. For example SW32_FM and POOL32C_SWE_FM

================
Comment at: lib/Target/Mips/MicroMipsInstrInfo.td:180-189
@@ -166,1 +179,12 @@
+
+class StoreMemory<string opstr, DAGOperand RO, DAGOperand MO,
+                  SDPatternOperator OpNode = null_frag,
+                  InstrItinClass Itin = NoItinerary,
+                  ComplexPattern Addr = addr> :
+  InstSE<(outs), (ins RO:$rt, MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
+         [(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
+  let DecoderMethod = "DecodeMem";
+  let mayStore = 1;
+}
+
 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
----------------
Given that this is microMIPSR6 specific, it should be in MicroMips32r6InstrInfo.td. It should also be using the <insn>_DESC_BASE naming convention.


http://reviews.llvm.org/D10869





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