[llvm] r244463 - fix minsize detection: minsize attribute implies optimizing for size
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 10 10:00:44 PDT 2015
Author: spatel
Date: Mon Aug 10 12:00:44 2015
New Revision: 244463
URL: http://llvm.org/viewvc/llvm-project?rev=244463&view=rev
Log:
fix minsize detection: minsize attribute implies optimizing for size
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=244463&r1=244462&r2=244463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 10 12:00:44 2015
@@ -24127,10 +24127,7 @@ static SDValue PerformOrCombine(SDNode *
return SDValue();
// fold (or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)
- MachineFunction &MF = DAG.getMachineFunction();
- // FIXME: Use Function::optForSize().
- bool OptForSize =
- MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
+ bool OptForSize = DAG.getMachineFunction().getFunction()->optForSize();
// SHLD/SHRD instructions have lower register pressure, but on some
// platforms they have higher latency than the equivalent
Modified: llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll?rev=244463&r1=244462&r2=244463&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll Mon Aug 10 12:00:44 2015
@@ -9,7 +9,7 @@
; return (a << 10) | (b >> 54);
; }
-; Function Attrs: minsize nounwind optsize readnone uwtable
+; Function Attrs: minsize nounwind readnone uwtable
define i64 @_Z8lshift10mm(i64 %a, i64 %b) #0 {
entry:
; CHECK: shldq $10
@@ -19,7 +19,7 @@ entry:
ret i64 %or
}
-attributes #0 = { minsize nounwind optsize readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { minsize nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
; clang -Os -c test2.cpp -emit-llvm -S
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