[llvm] r244357 - MIR Serialization: Serialize the base alignment for the machine memory operands.

Alex Lorenz via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 7 13:48:30 PDT 2015


Author: arphaman
Date: Fri Aug  7 15:48:30 2015
New Revision: 244357

URL: http://llvm.org/viewvc/llvm-project?rev=244357&view=rev
Log:
MIR Serialization: Serialize the base alignment for the machine memory operands.

Added:
    llvm/trunk/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
    llvm/trunk/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
Modified:
    llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
    llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
    llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
    llvm/trunk/lib/CodeGen/MIRPrinter.cpp
    llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir

Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp?rev=244357&r1=244356&r2=244357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp Fri Aug  7 15:48:30 2015
@@ -200,6 +200,7 @@ static MIToken::TokenKind getIdentifierK
       .Case("volatile", MIToken::kw_volatile)
       .Case("non-temporal", MIToken::kw_non_temporal)
       .Case("invariant", MIToken::kw_invariant)
+      .Case("align", MIToken::kw_align)
       .Default(MIToken::Identifier);
 }
 

Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.h?rev=244357&r1=244356&r2=244357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.h (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.h Fri Aug  7 15:48:30 2015
@@ -69,6 +69,7 @@ struct MIToken {
     kw_volatile,
     kw_non_temporal,
     kw_invariant,
+    kw_align,
 
     // Identifier tokens
     Identifier,

Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=244357&r1=244356&r2=244357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Fri Aug  7 15:48:30 2015
@@ -1128,13 +1128,24 @@ bool MIParser::parseMachineMemoryOperand
   int64_t Offset = 0;
   if (parseOffset(Offset))
     return true;
-  // TODO: Parse the base alignment.
+  unsigned BaseAlignment = Size;
+  if (Token.is(MIToken::comma)) {
+    lex();
+    if (Token.isNot(MIToken::kw_align))
+      return error("expected 'align'");
+    lex();
+    if (Token.isNot(MIToken::IntegerLiteral))
+      return error("expected an integer literal after 'align'");
+    if (getUnsigned(BaseAlignment))
+      return true;
+    lex();
+  }
   // TODO: Parse the attached metadata nodes.
   if (expectAndConsume(MIToken::rparen))
     return true;
 
-  Dest =
-      MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size, Size);
+  Dest = MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size,
+                                 BaseAlignment);
   return false;
 }
 

Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=244357&r1=244356&r2=244357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Fri Aug  7 15:48:30 2015
@@ -679,7 +679,8 @@ void MIPrinter::print(const MachineMemOp
     printIRValueReference(*Val);
   // TODO: Print PseudoSourceValue.
   printOffset(Op.getOffset());
-  // TODO: Print the base alignment.
+  if (Op.getBaseAlignment() != Op.getSize())
+    OS << ", align " << Op.getBaseAlignment();
   // TODO: Print the metadata attributes.
   OS << ')';
 }

Added: llvm/trunk/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir?rev=244357&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir Fri Aug  7 15:48:30 2015
@@ -0,0 +1,32 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+  define void @memory_alignment(<8 x float>* %vec) {
+  entry:
+    %v = load <8 x float>, <8 x float>* %vec
+    %v2 = insertelement <8 x float> %v, float 0.0, i32 4
+    store <8 x float> %v2, <8 x float>* %vec
+    ret void
+  }
+
+...
+---
+name:            memory_alignment
+tracksRegLiveness: true
+liveins:
+  - { reg: '%rdi' }
+body:
+  - id:          0
+    name:        entry
+    liveins:     [ '%rdi' ]
+    instructions:
+# CHECK: [[@LINE+1]]:70: expected 'align'
+      - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, 32)'
+      - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
+      - '%xmm2 = FsFLD0SS'
+      - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
+      - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
+      - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
+      - RETQ
+...

Added: llvm/trunk/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir?rev=244357&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir Fri Aug  7 15:48:30 2015
@@ -0,0 +1,32 @@
+# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
+
+--- |
+
+  define void @memory_alignment(<8 x float>* %vec) {
+  entry:
+    %v = load <8 x float>, <8 x float>* %vec
+    %v2 = insertelement <8 x float> %v, float 0.0, i32 4
+    store <8 x float> %v2, <8 x float>* %vec
+    ret void
+  }
+
+...
+---
+name:            memory_alignment
+tracksRegLiveness: true
+liveins:
+  - { reg: '%rdi' }
+body:
+  - id:          0
+    name:        entry
+    liveins:     [ '%rdi' ]
+    instructions:
+# CHECK: [[@LINE+1]]:75: expected an integer literal after 'align'
+      - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align)'
+      - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
+      - '%xmm2 = FsFLD0SS'
+      - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
+      - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
+      - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
+      - RETQ
+...

Modified: llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir?rev=244357&r1=244356&r2=244357&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir Fri Aug  7 15:48:30 2015
@@ -51,6 +51,14 @@
     ret void
   }
 
+  define void @memory_alignment(<8 x float>* %vec) {
+  entry:
+    %v = load <8 x float>, <8 x float>* %vec
+    %v2 = insertelement <8 x float> %v, float 0.0, i32 4
+    store <8 x float> %v2, <8 x float>* %vec
+    ret void
+  }
+
 ...
 ---
 name:            test
@@ -154,3 +162,26 @@ body:
       - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)'
       - RETQ
 ...
+---
+name:            memory_alignment
+tracksRegLiveness: true
+liveins:
+  - { reg: '%rdi' }
+body:
+  - id:          0
+    name:        entry
+    liveins:     [ '%rdi' ]
+    instructions:
+# CHECK: name: memory_alignment
+# CHECK:      %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)
+# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)
+# CHECK:      MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)
+# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)
+      - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)'
+      - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
+      - '%xmm2 = FsFLD0SS'
+      - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
+      - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
+      - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
+      - RETQ
+...




More information about the llvm-commits mailing list