[PATCH] D11800: [ARM] Reorganise and simplify thumb-1 load/store selection
James Molloy via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 7 00:58:17 PDT 2015
jmolloy requested changes to this revision.
jmolloy added a comment.
This revision now requires changes to proceed.
Hi John,
There appears to be quite a bit of reordering going on in this diff, and I had difficulty working out if it was cleanup or if it had semantic meaning. Like moving defm _rr after defm _ri. Can you please undo this or mark what is just cleanup (and submit that separately when committing)?
I'm having difficulty understanding why you're removing the selection of register+scaled-immediate addressing modes entirely. Was that code always pessimistic? Is RO always better? A bit of explanation of the rationale would really help (and that rationale should be repeated in the commit message!)
Cheers,
James
Repository:
rL LLVM
http://reviews.llvm.org/D11800
More information about the llvm-commits
mailing list