[PATCH] D11796: [PATCH, Mips] Remap move as or.

[Simon Dardis via llvm-commits]

sdardis created this revision.
sdardis added a reviewer: vkalintiris.
sdardis added a subscriber: llvm-commits.

This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or
'addu'. The use of addu/daddu instead of or as move was highlighted as a
performance issue during the analysis of a recent 64bit design. Originally
move was encoded as 'or' by binutils but was changed for the r10k cpu family
due to their pipeline which had 2 arithmetic units and a single logical unit,
and so could issue multiple (d)addu based moves at the same time but only 1
logical move.
    
This patch preserves the disassembly behaviour so that disassembling a old style
(d)addu move still appears as move, but assembling move always gives an or

http://reviews.llvm.org/D11796

Files:
  lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
  lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
  lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/MipsAsmPrinter.cpp
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Mips/MipsSEFrameLowering.cpp
  lib/Target/Mips/MipsSEInstrInfo.cpp
  test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
  test/MC/Disassembler/Mips/mips1/valid-mips1.txt
  test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
  test/MC/Disassembler/Mips/mips2/valid-mips2.txt
  test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
  test/MC/Disassembler/Mips/mips3/valid-mips3.txt
  test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
  test/MC/Disassembler/Mips/mips32/valid-mips32.txt
  test/MC/Disassembler/Mips/mips32_le.txt
  test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
  test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
  test/MC/Disassembler/Mips/mips4/valid-mips4.txt
  test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
  test/MC/Disassembler/Mips/mips64/valid-mips64.txt
  test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
  test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
  test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
  test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
  test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
  test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
  test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
  test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
  test/MC/Mips/mips-alu-instructions.s
  test/MC/Mips/mips1/valid.s
  test/MC/Mips/mips2/valid.s
  test/MC/Mips/mips3/valid.s
  test/MC/Mips/mips32/valid.s
  test/MC/Mips/mips32r2/valid.s
  test/MC/Mips/mips32r3/valid.s
  test/MC/Mips/mips32r5/valid.s
  test/MC/Mips/mips32r6/valid.s
  test/MC/Mips/mips4/valid.s
  test/MC/Mips/mips5/valid.s
  test/MC/Mips/mips64-alu-instructions.s
  test/MC/Mips/mips64/valid.s
  test/MC/Mips/mips64r2/valid.s
  test/MC/Mips/mips64r3/valid.s
  test/MC/Mips/mips64r5/valid.s
  test/MC/Mips/mips64r6/valid.s

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