[PATCH] D11689: Fix the addition of implicit register operands in incorrect order in SiInstrInfo.

[Matt Arsenault]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:2600
@@ -2598,15 +2599,3 @@
   // Add the implict and explicit register definitions.
-  if (NewDesc.ImplicitUses) {
-    for (unsigned i = 0; NewDesc.ImplicitUses[i]; ++i) {
-      unsigned Reg = NewDesc.ImplicitUses[i];
-      Inst->addOperand(MachineOperand::CreateReg(Reg, false, true));
-    }
-  }
-
-  if (NewDesc.ImplicitDefs) {
-    for (unsigned i = 0; NewDesc.ImplicitDefs[i]; ++i) {
-      unsigned Reg = NewDesc.ImplicitDefs[i];
-      Inst->addOperand(MachineOperand::CreateReg(Reg, true, true));
-    }
-  }
+  Inst->addImplicitDefUseOperands(*Inst->getParent()->getParent());
 }
----------------
I didn't know about this function. I think it's OK to delete addDescImplicitUseDef and just use  Inst->addImplicitDefUseOperands in the one place it is used


Repository:
  rL LLVM

http://reviews.llvm.org/D11689