[llvm] r243661 - AMDGPU: Set SubRegIndex size and offset

[Matt Arsenault]

Author: arsenm
Date: Thu Jul 30 12:03:11 2015
New Revision: 243661

URL: http://llvm.org/viewvc/llvm-project?rev=243661&view=rev
Log:
AMDGPU: Set SubRegIndex size and offset

I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterInfo.td

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterInfo.td?rev=243661&r1=243660&r2=243661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterInfo.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterInfo.td Thu Jul 30 12:03:11 2015
@@ -14,8 +14,7 @@
 let Namespace = "AMDGPU" in {
 
 foreach Index = 0-15 in {
-  // Indices are used in a variety of ways here, so don't set a size/offset.
-  def sub#Index : SubRegIndex<-1, -1>;
+  def sub#Index : SubRegIndex<32, !shl(Index, 5)>;
 }
 
 def INDIRECT_BASE_ADDR : Register <"INDIRECT_BASE_ADDR">;